Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 550

Programming Model
• The global
Starting a Ping-Pong DMA Transfer
To start a ping-pong DMA transfer from the FIFO to memory:
1. Clear the FIFO by setting (= 1) the
IDP_CTL1
2. While the global
the values for the following DMA parameter registers that corre-
spond to channels 7–0.
3. Keep the clock and the frame sync input of the serial inputs and/or
the PDAP connected to LOW, by setting proper values in the SRU
registers.
4. Refer to
5. Connect all of the required inputs to the IDP by writing to the
SRU registers.
6. Enable the channel's
settings.
7. Start DMA by setting:
• The
PDAP is required).
• The global
the standard DMA of the selected channel.
• The global
11-30
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bit (bit 7 in the
IDP_EN
register).
IDP_DMA_EN
"Setting Miscellaneous Bits"
IDP_ENx
bit (bit 31 in
IDP_PDAP_EN
IDP_DMA_EN
bit (bit 7 in the
IDP_EN
ADSP-214xx SHARC Processor Hardware Reference
IDP_CTL0
bit (bit 31 in the
IDP_FFCLR
and bits are cleared (=0), set
IDP_EN
above.
, and
IDP_DMA_ENx
IDP_PP_CTL
bit of the
IDP_CTL0
IDP_CTL0
register).
bit
IDP_PINGx
register if the
register to enable
register).