Pin Buffers As Open Drain; Dai/Dpi Pin Buffer Status - Analog Devices SHARC ADSP-214 Series Hardware Reference Manual

Pin Buffers as Open Drain

For peripherals like the TWI and SPI (multi processing), the bus protocol
requires the pin drivers to work in open drain mode
mit and receive operation. The signal input of the assigned pin buffer is
tied low. The peripheral's data output signal is connected to the
nal. In open drain mode, if
on the bus activities. If
low level) and ties the bus low level. Note that for the SPI the
the register must be enabled.
SPICTL
PIN BUFFER
OUTPUT
PIN BUFFER
INPUT
(TIED LOW)
INTERFACE
TO SRU
PIN BUFFER
ENABLE
TWI_DATA_PBEN_O
Figure 9-6. Pin Buffer as Open Drain

In open drain mode the data output signal is the peripheral's
signal
PBEN_O

DAI/DPI Pin Buffer Status

The signal levels on the DAI/DPI pins can be read with the
/
DAI DPI_PIN_STAT
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
Digital Application/Digital Peripheral Interfaces
= low, the level on the pin is depending
PBEN
= high, the driver is conducting (input always
PBEN
DAI_PBxx_O
DAI_PBxx_I
BUFFER
IN
PBENxx_I
registers. This allows conditions like for example:
(Figure
PIN
OUT
PIN
ENABLE
9-6) for trans-
sig-
PBEN
bit in
ODP
EXTERNAL DAI
PIN BUFFER
9-11