Data Memory; Coefficient Memory; Internal Memory Storage; Coefficient Memory Storage - Analog Devices SHARC ADSP-214 Series Hardware Reference Manual

IIR Accelerator

Data Memory

The size of data memory is 576 x 40 bits and is used to hold the dk1 and
dk2 intermediate data of all the biquads locally. The DMA controller
fetches the sample data from internal memory and calculates the output as
well as the dk1 and dk2 values for each biquad and stores them in data
memory.

Coefficient Memory

The size of coefficient memory is 1440 x 40 bits and is used to store all the
coefficients of all the biquads. At start-up, DMA loads the coefficients
from internal memory into coefficient memory.

Internal Memory Storage

This section describes the required storage model for the IIR accelerator.

Coefficient Memory Storage

Coefficients and Dk values for a particular biquad BQD[k] should be
stored in internal memory in the order Ak0, Ak1, Bk1, Ak2, Bk2, Dk2,
Dk1.

The naming convention for the filter coefficients used here is dif-
ferent from the one used in MATLAB. The following conversion
should be used when using MATLAB generated coefficients:
(Akx = bx and Bkx = –ax).
In other words, the coefficients for each biquad should be stored in
the order:
b0, b1, –a1, b2, –a2, dk2, dk1
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ADSP-214xx SHARC Processor Hardware Reference