Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 726

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Data Transfer Types

Figure 20-4. UART Receive Buffer Register

length of a single word. A receive filter removes spurious pulses of less

than two times the sampling clock period.

Because of the destructive nature of reading this register, a shadow

main register.

Core Transfers

Core transfers move data to and from the UART by the processor core. To

transmit a character, load it into the

be read from the

character at time.

To prevent any loss of data and misalignments of the serial data stream,

the UART line status register (

flag is set when the

and cleared when the processor loads new data into the

Writing this register when it is not empty overwrites the register with the

new value and the previous character is never transmitted.

flag signals when new data is available in the

This flag is cleared automatically when the processor reads from this

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For more information, see "Debug Features" on

ADSP-214xx SHARC Processor Hardware Reference

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) provides two status flags for hand-

Higher Byte (23–16)

Lower Byte (7–0)

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