8-Bit Instruction Storage And Packing - Analog Devices SHARC ADSP-214 Series Hardware Reference Manual

Data Transfer

8-Bit Instruction Storage and Packing

In Table 3-20, the logical to physical translation is a multiplication by a
factor of 6 and N = 0xAAAA9. Therefore, the 8-bit wide AMI supports
0.7 million instructions.
Table 3-20. Logical Versus Physical Address Mapping,
8-Bit AMI
Logical ISA Normal Word
Address, Program Sequencer
0x20 0000
0x20 0001
...
0x2A AAA9
3-92
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Physical Address, External Bus
0xC0 0000
0xC0 0001
0xC0 0002
0xC0 0003
0xC0 0004
0xC0 0005
0xC0 0006
0xC0 0007
0xC0 0008
0xC0 0009
0xC0 000A
0xC0 000B
...
0xFF FFFC
0xFF FFFD
0xFF FFFE
0xFF FFFF
ADSP-214xx SHARC Processor Hardware Reference
Data7–0
Instr0[7:0]
Instr0[15:8]
Instr0[23:16]
Instr0[31:24]
Instr0[39:32]
Instr0[47:40]
Instr1[7:0]
Instr1[15:8]
Instr1[23:16]
Instr1[31:24]
Instr1[39:32]
Instr1[47:40]
InstrN[23:16]
InstrN[31:24]
InstrN[39:32]
InstrN[47:40]