Contents
Programming Model ................................................................... 4-22
Receive DMA ....................................................................... 4-24
Transmit DMA ..................................................................... 4-24
Features ........................................................................................ 5-2
Register Overview ......................................................................... 5-2
Clocking ...................................................................................... 5-2
Data Buffer ............................................................................. 5-3
DMA Transfer ........................................................................ 5-4
Interrupts ..................................................................................... 5-4
MTM Throughput ....................................................................... 5-5
Effect Latency .............................................................................. 5-5
Programming Model ..................................................................... 5-5
FFT Accelerator ............................................................................ 6-3
Features .................................................................................. 6-4
Clocking ................................................................................. 6-5
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ADSP-214xx SHARC Processor Hardware Reference