Serial Word Length; Internal Versus External Frame Syncs - Analog Devices SHARC ADSP-214 Series Hardware Reference Manual

Functional Description

Serial Word Length

The serial word length is not unique and is based on the operation mode.
Moreover the companding feature limits the word length settings.
Words smaller than 32 bits are right-justified in the receive and transmit
buffers, residing in the least significant (LSB) bit positions
Table 10-4. Data Length Versus Modes
Mode
Standard Serial Mode
Left justified
2
I S
Packed
Multichannel

Internal Versus External Frame Syncs

Both transmit and receive frame syncs can be generated internally or input
from an external source. The
determines the frame sync source.
When /
IFS IMFS
ated internally by the processor, and the
The frequency of the frame sync signal is determined by the value of the
frame sync divisor (
When /
IFS IMFS
accepted as an input on the
in the registers are ignored.
DIVx
All frame sync options are available whether the signal is generated inter-
nally or externally.
10-18
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Word Length (SLEN) Bits
3–32
8–32
8–32
3–32
3–32
/
IFS IMFS
is set (=1), the corresponding frame sync signal is gener-
) in the
FSDIV DIVx
is cleared (=0), the corresponding frame sync signal is
SPORTx_FS
ADSP-214xx SHARC Processor Hardware Reference
bit of the control register
SPCTLx
signal is an output.
SPORTx_FS
register.
signals, and the frame sync divisors
(Table 10-4).