Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 570

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Effect Latency
SRC Effect Latency
After the ASRC registers are configured the effect latency is 1.5
cycles minimum and 3
12-18
www.BDTIC.com/ADI
cycles maximum.
PCLK
ADSP-214xx SHARC Processor Hardware Reference
PCLK

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