Related Manuals for Analog Devices ADSP-21000
Summary of Contents for Analog Devices ADSP-21000
- Page 1 ADSP-21000 Family ADSP-21000 Family ADSP-21000 Family ADSP-21000 Family ADSP-21000 Family Application Handbook Volume Application Handbook Volume Application Handbook Volume Application Handbook Volume Application Handbook Volume 1 1 1 1 1...
- Page 2 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringement of patents, or other rights of third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices.
- Page 3 For marketing information or Applications Engineering assistance, contact your local Analog Devices sales office or authorized distributor. If you have suggestions for how the ADSP-2100 Family development tools or documentation can better serve your needs, or you need Applications Engineering assistance from Analog Devices, please contact: Analog Devices, Inc.
- Page 4 ADSP-21000 FAMILY MANUALS ADSP-21020 User’s Manual ADSP-21000 SHARC Preliminary Users Manual Complete description of processor architectures and system interfaces. ADSP-21000 Family Assembler Tools & Simulator Manual ADSP-21000 Family C Tools Manual ADSP-21000 Family C Runtime Library Manual Programmer’s references. ADSP-21020 EZ-ICE Manual ADSP-21020 EZ-LAB Manual User’s manuals for in-circuit emulators and demonstration boards.
- Page 5 1.3.3.3 Extended IEEE-Floating-Point Support ......6 1.3.3.4 Dual Address Generators ........... 6 1.3.3.5 Efficient Program Sequencing ........... 6 ADSP-21000 FAMILY ARCHITECTURE OVERVIEW ....7 1.4.1 ADSP-21000 Family Base Architecture ........7 1.4.2 ADSP-21020 DSP................8 1.4.3 ADSP-21060 SHARC ..............10...
- Page 6 Contents Contents Contents Contents Contents CHAPTER 2 TRIGONOMETRIC, MATHEMATICAL & TRANSCENDENTAL FUNCTIONS SINE/COSINE APPROXIMATION ..........15 2.1.1 Implementation ................16 2.1.2 Code Listings ................18 2.1.2.1 Sine/Cosine Approximation Subroutine ....... 18 2.1.2.2 Example Calling Routine ..........21 TANGENT APPROXIMATION ............22 2.2.1 Implementation ................
- Page 7 Contents Contents Contents Contents Contents CHAPTER 3 MATRIX FUNCTIONS STORING A MATRIX ............... 72 MULTIPLICATION OF A M×N MATRIX BY AN N×1 VECTOR ................ 73 3.2.1 Implementation ................73 3.2.2 Code Listing—M×N By N×1 Multiplication ......75 MULTIPLICATION OF A M×N MATRIX BY A N×O MATRIX ................
- Page 8 Contents Contents Contents Contents Contents 5.2.2 Code Listing—interpol.asm ........... 124 RATIONAL RATE CHANGER (TIMER-BASED) ...... 129 5.3.1 Implementation ................ 129 5.3.2 Code Listings—ratiobuf.asm ..........133 RATIONAL RATE CHANGER (EXTERNAL INTERRUPT-BASED)..........138 5.4.1 Implementation ................ 138 5.4.2 Code Listing—rat_2_int.asm..........139 TWO-STAGE DECIMATION FILTER .......... 143 5.5.1 Implementation ................
- Page 9 Contents Contents Contents Contents Contents 6.2.5.1 Code Listing—selms.asm ..........177 6.2.6 Sign-Data LMS (Transversal) ..........179 6.2.6.1 Code Listing—sdlms.asm ..........180 6.2.7 Sign-Sign LMS (Transversal)..........183 6.2.7.1 Code Listing—sslms.asm ..........183 6.2.8 Symmetric Transversal Filter Implementation LMS ..185 6.2.8.1 Code Listing—sylms.asm ..........
- Page 10 Contents Contents Contents Contents Contents CHAPTER 8 GRAPHICS 3-D GRAPHICS LINE ACCEPT/REJECT ........237 8.1.1 Implementation ................ 239 8.1.2 Code Listing ................240 CUBIC BEZIER POLYNOMIAL EVALUATION ....... 244 8.2.1 Implementation ................ 245 8.2.2 Code Listing ................246 CUBIC B-SPLINE POLYNOMIAL EVALUATION....248 8.3.1 Implementation ................
- Page 11 Contents Contents Contents Contents Contents 9.3.1 Implementation ................ 289 9.3.2 Code Listing ................290 ONE-DIMENSIONAL MEDIAN FILTERING ......292 9.4.1 Implementation ................ 292 9.4.2 Code Listings ................294 REFERENCES................... 298 CHAPTER 10 JTAG DOWNLOADER 10.1 HARDWARE ..................300 10.1.1 Details ..................301 10.1.2 Test Access Port Operations ...........
- Page 12 Contents Contents Contents Contents Contents Figure 6.1 System Identification Model ..........158 Figure 6.2 Transversal FIR Filter Structure..........161 Figure 6.3 Symmetric Transversal Filter Structure ........ 162 Figure 6.4 One Stage Of Lattice FIR ............163 Figure 6.5 Generic Adaptive Filter ............167 Figure 7.1 Flow Graph Of Butterfly Calculation ........
- Page 13 Contents Contents Contents Contents Contents Table 10.1 Parts List ..................304 Table 10.2 JTAG States Used By The Downloader ........ 306 Table 10.3 Downloader Operations ............307 Table 10.4 Source Code Description & Usage ........310 Table 10.5 Bitstream/EPROM Byte Relationship ........311 Table 10.6 TMS Values For State Transitions .........
- Page 14 Contents Contents Contents Contents Contents Listing 5.4 rat2int.asm ................142 Listing 5.5 dec2stg.asm ................149 Listing 5.6 int2stg.asm ................155 Listing 6.1 lms.asm..................170 Listing 6.2 llms.asm ..................173 Listing 6.3 nlms.asm ................... 176 Listing 6.4 selms.asm .................. 179 Listing 6.5 sdlms.asm .................
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