Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 811

Table of Contents

If more than four flags are required, they can multiplexed using the exter-

nal port pins in the

For a detailed flag description refer to the SHARC Processor Programming

the settings of the memory select enable, the flag timer expired and the

interrupt bits in the system control register.

Table 23-14. Flag 3–2 Truth Table (SYSCTL Register)

Backward Compatibility

(0, 1, 2, 3) pins retain their old functionality and program-

ming. No changes are required for old programs. The select lines for

multiplexes are controlled by the

see "System Control Register (SYSCTL)" on page A-4.

External Port Pin Multiplexing

Various peripherals use the external port for off-chip communication.

These peripherals use multiplexed I/O pins and have the (functions)

• External Port (AMI/SDRAM/DDR2)

• PDAP (input)

ADSP-214xx SHARC Processor Hardware Reference

www.BDTIC.com/ADI

) are connected as input after reset.

provides information on

TMREXPEN Bit IRQ2EN Bit

System Design

function based on

FLAG3 Function FLAG2 Function

For more information,

Chapters

Table of Contents