Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 974

DAI Signal Routing Unit Registers
Table A-82. Group G Sources – Shift Register Data Routing (Cont'd)
Selection Code
01111 (0xF)
10000 (0x10)
10001 (0x11)
10010 (0x12)
10011 (0x13)
10100 (0x14)
10101 (0x15)
10110 (0x16)
10111 (0x17)
11000 (0x18)
11001 (0x19)
11010 (0x1A)
11011 (0x1B) –
11111 (0x1F)
DAI Pin Buffer Registers
The register, shown in
DAI_STAT
Table A-94, and the
page A-149, provide status information for the IDP/PDAP DMA
channels.
Pin Buffer Registers (DAI_PIN_STAT)
The
DAI_PIN_STAT
fer status information. This register is updated at up to the
A-148
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Source Signal
SPORT6_DB_O
SPORT7_DA_O
SPORT7_DB_O
SR_SDI
DAI_P01_O
DAI_P02_O
DAI_P03_O
DAI_P04_O
DAI_P05_O
DAI_P06_O
DAI_P07_O
DAI_P08_O
Reserved
Figure A-97
DAI_PIN_STAT
register, shown in
ADSP-214xx SHARC Processor Hardware Reference
Description (Output Source Selection)
Sport 6 Data Channel B
Sport 7 Data Channel A
Sport 7 Data Channel B
External SR_SDI Pin
DAI External Pin 1
DAI External Pin 2
DAI External Pin 3
DAI External Pin 4
DAI External Pin 5
DAI External Pin 6
DAI External Pin 7
DAI External Pin 8
and described in
register, shown in Figure A-83 on
Figure A-83, provides DAI pin buf-
/2 rate.
PCLK