Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 836

System and Power Management Registers
31 30
MLBOFF
MLB Clock Shutdown
ACCSEL (18–17)
Accelerator Select
15
LP1OFF
LP1 Clock Shutdown
LP0OFF
LP0 Clock Shutdown
TMROFF
Timer Clock Shutdown
SPIOFF
SPI Clock Shutdown
SP67OFF
SP6/7 Clock Shutdown
SP45OFF
SP4/5 Clock Shutdown
SP23OFF
SP2/3 Clock Shutdown
Figure A-3. PMCTL1 Register
Table A-4. PMCTL1 Register Bit Descriptions (RW)
Bit Name
0 UART0OFF
1 TWIOFF
2 PWMOFF
3 DTCPOFF
A-10
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29 28 27 26 25 24 23 22
14 13 12 11 10 9 8 7
Description
Shutdown Clock to UART.
0 = UART is in normal mode
1 = Shutdown clock to UART
Shutdown Clock to TWI.
0 = TWI is in normal mode
1 = Shutdown clock to TWI
Shutdown Clock to PWM.
0 = PWM is in normal mode
1 = Shutdown clock to PWM
Shutdown Clock to MTM/DTCP.
0 = MTM is in normal mode
1 = Shutdown clock to MTM
ADSP-214xx SHARC Processor Hardware Reference
21 20 19 18 17 16
ACCOFF
Accelerator Clocks
Shutdown
6 5 4 3 2 1 0
UART0POFF
UART Clock Shutdown
TWIOFF
TWI Clock Shutdown
PWMOFF
PWM Clock Shutdown
DTCPOFF
DTCP Clock Shutdown
DAIOFF
Shutdown Clock to SRC,
SPDIF, SRU, PCG, DAI, IDP,
PDAP
EPOFF
EP Clock Shutdown
SP01OFF
SP0/1 Clock Shutdown