Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 373

Table 7-3. PWM Connections (Cont'd)
PWM Unit
PWM2
PWM3
SRU Programming
The ADSP-2147x and 2148x can output the PWM units 3–1 over the
DPI pins. The
routing output logic for the DPI group B register.
Register Overview
This section provides brief descriptions of the major registers. For com-
plete register information, see
• PWM global control register (PWMGCTL). Enables or disables
the four PWM groups simultaneously in any combination for syn-
chronization between the PWM groups.
• PWM global status register (PWMGSTAT). Provides the status of
each PWM group.
• PWM control registers (PWMCTLx). Used to set the operating
modes of each PWM block. This register also allows programs to
disable interrupts from individual groups.
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
Pin Multiplexing
AMI_ADDR16 = AL2
AMI_ADDR17 = AH2
AMI_ADDR18 = BL2
AMI_ADDR19 = BH2
AMI_ADDR20 = AL3
AMI_ADDR21 = AH3
AMI_ADDR22 = BL3
AMI_ADDR23 = BH3
bit (bit 30 in the
PWMONDPIEN
Appendix A, Registers
Pulse Width Modulation
register) enables the
SYSCTL
Reference.
7-5