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• Word length (
• Channel Order (
• Word Packing (
2
I
S mode is simply a subset of the left-justified mode. Note that in
2
I
S mode, the data is delayed by one
transfer starts on the left channel first (
When both SPORT channels A and B are used in I
mode with standard DMA enabled, then the DMA count should
be the same for both channels.
Figure 10-7
illustrates timing in I
1,
= 1, and
LAFS
SPORTx_CLK
SPORTx_FS/WS
I 2 S MODE
SPORTx_DA/DB DATA
WORD n-1
RIGHT CHANNEL
Figure 10-7. Word Select Timing in I
Multichannel Mode
The processor's serial ports offer a multichannel mode of operation, which
allows the SPORT to communicate in a time division multiplexed (TDM)
serial system. In multichannel communications, each data word of the
serial bit stream occupies a separate channel. Each word belongs to the
next consecutive channel. For example, a 24-word block of data contains
one word for each of the 24 channels.
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
, 8–32 bits)
SLEN
)
L_FIRST
)
PACK
2
= 0.
L_FIRST
MSB n
LSB
n-1
WORD n
LEFT CHANNEL
cycle and the operation
SCLK
L_FIRST
S mode. In this example case,
LSB n
MSB n+1
RIGHT CHANNEL
2
S Mode
Serial Ports
= 1).
2
S/left-justified
=
OPMODE
WORD n+1
10-31
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