Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 649

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DMA Slave Transfers
To configure the SPI port for slave mode DMA transfers:
1. Define DMA receive (or transmit) transfer parameters by writing
to the
IISPIx
2. Write to the
(
, bit 0). And configure the following:
SPIDEN
• A receive access (
• A transmit access (
Chained DMA Transfers
The sequence for setting up and starting a chained DMA is outlined in the
following steps.
1. Clear the chain pointer register.
2. Configure the TCB associated with each DMA in the chain except
for the first DMA in the chain.
3. Write the first three parameters for the initial DMA to the
,
IMSPI
CSPI
4. Configure the DMA settings for the entire sequence, enabling
DMA and DMA chaining in the
5. Begin the DMA by writing the address of a TCB (describing the
second DMA in the chain) to the
Stopping SPI Transfers
External transfer completion is indicated by the SPI status bit
core-driven transfers it shows that the read transfer (
transfer (
TIMOD
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
,
, and
IMSPIx
register to enable the SPI DMA engine
SPIDMACx
SPIRCV
SPIRCV
,
,
IISPIB
IMSPIB
= 01) has been completed on the external interface. For
Serial Peripheral Interface Ports
registers.
CSPIx
= 1) or
= 0)
, and
registers directly.
CSPIB
register.
SPIDMAC
,
CPSPI
CPSPI
TIMOD
,
IISPI
registers.
. For
SPIFE
= 00) or write
15-33

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