Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 654

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Programming Model

With SPI enabled:

1. Disable DMA and clear the DMA FIFO by

operation is cleared before configuring a new DMA operation.

2. Clear the

abling SPI. This can be done by ORing 0xC0000 with the present

value in the

3. Clear all errors by writing to the W1C-type bits in the

4. Reconfigure the

5. Configure DMA by writing to the DMA parameter registers and

Multi-Master Transfers

The following steps show how to implement a system with two SPI

devices. Since the slaves cannot initiate transfers over the bus, the master

must send frames over the

to the bus by sending messages over the

1. Slave writes message to its

2. Slave starts polling its

3. Message is latched by current master and decoded.

4. Master deasserts the slave select signal and clears the

become a slave.

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registers and the buffer status without dis-

registers. Use the

registers and the buffer status.

registers are cleared when a new DMA is configured.

pin. This ensures that slaves can respond

ADSP-214xx SHARC Processor Hardware Reference

pin to the bus master.

pin which is currently low.

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