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21 TWO WIRE INTERFACE
CONTROLLER
The two wire interface (TWI) controller allows a device to interface to an
inter-IC bus as specified by Philips. The TWI is fully compatible with the
2
widely used I
C bus standard. It is designed with a high level of function-
ality and is compatible with multi-master, multi-slave bus configurations.
To preserve processor bandwidth, the TWI controller can be set up with
transfer initiated interrupts to service FIFO buffer data reads and writes
only. Protocol related interrupts are optional.The TWI specifications are
shown in
Table
Table 21-1. TWI Specifications
Feature
Connectivity
Multiplexed Pinout
SRU DAI Required
SRU DAI Default Routing
SRU2 DPI Required
SRU2 DPI Default Routing
Interrupt Control
Protocol
Master Capable
Slave Capable
Transmission Simplex
Transmission Half Duplex
Transmission Full Duplex
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
21-1.
Availability
No
No
N/A
Yes
Yes
Yes
Yes
Yes
21-1
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