Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 955

31 30
SPORT5_FS_I (29–25)
Serial Port 5 Frame Sync Input
15
SPORT3_FS_I (19–15)
SPORT2_FS_I (14–10)
Serial Port 2 Frame Sync Input
Figure A-65. SRU_FS0 Register (RW)
31 30
SRC2_FS_OP_I (29–25)
Sample Rate Converter 2
Frame Sync Output Input
15
SRC1_FS_OP_I (19–15)
SRC1_FS_IP_I (14–10)
Sample Rate Converter 1
Frame Sync Input Input
Figure A-66. SRU_FS1 Register (RW)
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
29 28 27 26 25 24 23 22
14 13 12 11 10 9 8 7
29 28 27 26 25 24 23 22
14 13 12 11 10 9 8 7
Registers Reference
21 20 19 18 17 16
SPORT3_FS_I (19–15) (con't)
Serial Port 3 Frame
Sync Input
SPORT4_FS_I (24–20)
Serial Port 4 Frame
Sync Input
6 5 4 3 2 1 0
SPORT0_FS_I (4–0)
Serial Port 0 Frame
Sync Input
SPORT1_FS_I (9–5)
Serial Port 1 Frame
Sync Input
21 20 19 18 17 16
6 5 4 3 2 1 0
Sample Rate Converter 0
Frame Sync Input Input
SRC1_FS_OP_I
(19–15) (con't)
Sample Rate Converter 1
Frame Sync Output Input
SRC2_FS_IP_I (24–20)
Sample Rate Converter 2
Frame Sync Input Input
SRC0_FS_IP_I (4–0)
SRC0_FS_OP_I (9–5)
Sample Rate Converter 0
Frame Sync Output Input
A-129