Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 231

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up DMA transfers, see
page
2-51. The registers that control external port DMA are described
Table
3-24.
Table 3-24. DMA Parameter Registers
Register
Description
IIEPx
Internal Index
IMEPx
Internal Modifier
ICEPx
Internal Count
EIEPx
External Index
EMEPx
External Modifier
ECEPx
External Count
CPEPx
Chain Pointer
Table 3-25. Enhanced DMA Parameter Registers
Register
Description
ELEPx
Circular Buffer Length
EBEPx
External Base
RIEPx
Read Internal Index
RCEPx
Read Count
RMEPx
Read External Modifier Contains external modifier to be used for delay line reads
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
"General Procedure for Configuring DMA" on
Comment
Internal Start Address.
For delay line DMA, it serves as the delay line write
index; for example, the start address of the internal
memory buffer for the external write data.
Internal address modifier.
For delay line DMA, it serves as count for delay line
writes, write block size.
External start address.
External address modifier.
External memory count, read only (alias of ICEPx)
Contains address of the next descriptor in internal
memory.
Comment
Hold circular buffer length for circular, delay line DMA,
scatter/gather DMA.
Hold circular start address for circular, delay line DMA,
scatter/gather DMA.
Contains start address of internal memory buffer to
which the data read from external memory during delay
line DMA reads are to be written into (alias of IIEPx
during delay line DMA).
Contains number of reads from each taplist, read block
size (alias of ICEPx during delay line DMA).
(alias of EMEPx during delay line DMA).
External Port
3-101

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