Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 517

Programming Packed Mode
Since packed mode is implemented on top of multichannel mode, pro-
gramming this mode is the same as programming multichannel mode. Use
the serial port control (
to configure the serial ports to run in packed mode as follows.
1. Configure the multichannel channel select registers.
2. Set the
OPMODE
packed master mode.
3. Clear the
4. To emulate I
bit field according to the channels in the
NCH
The bit field and the
MFD
timing as follows.
1. The
MFD
sync occurred.
2. The
L_FIRST
Additional Information for External
Frame Sync Operation
There are two procedures which allow programs to save SPORT initializa-
tion during an inactive frame sync:
• Read the
prior to starting SPORT configuration.
• Route a
falling edge) as an interrupt trigger to generate an interrupt to start
SPORT configuration.
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
) and channel selection registers (
SPCTLx
, , ,
ICLK IFS CKRE
bit to run in packed mode.
LSBF
2
S in packed mode, set the
bit allow programs to manipulate the
L_FIRST
bit field selects the data delay in
bit allows to swap the left and right channels.
register of the frame sync to get the level
DAI_PIN_STAT
register input to the external frame signal (rising or
MISCA
bits in the register to run in
SPCTLx
bit field to one and the
MFD
SPMCTLx
cycles after the frame
SCLK
Serial Ports
)
SPMCTLx
register.
10-59