Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 793

Table 23-4. DMAC0 Boot Settings (0x1000001) (Cont'd)
Bit
3
4
5
7
8
9
12
17–16
20
21
22
23
24
25
Table 23-5. Parameter Initialization for External Port Boot
Parameter Register
IIEP0
IMEP0
ICEP0
EIEP0
EMEP0
ECEP0
ADSP-214xx SHARC Processor Hardware Reference
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Name Setting
DLEN No delay line DMA (cleared = 0)
CBEN No circular DMA (cleared = 0)
DFLSH Disabled (cleared = 0)
WRBEN Disabled (cleared = 0)
OFCEN Disabled (cleared = 0)
TLEN Disabled (cleared = 0)
INTIRT Disabled (cleared = 0)
DFS Status (cleared = 00)
DMAS Status (cleared = 0)
CHS Status (cleared = 0)
TLS Status (cleared = 0)
WBS Status (cleared = 0)
EXTS External access pending (set = 1)
DIRS Status (cleared = 0)
Initialization Value
IVT_START_ADDR
0x1
0x180
0x4000000
0x1
0x180
System Design
Comment
Start of block 0
×
384 32-bit transfers
External memory select 1 start address
×
384 32-bit transfers
23-11