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Programming Model
Executing the Boot Kernel
1. The DMA completes (counter zero) and the interrupt associated
with the peripheral that the processor is booting from is activated.
2. The processor jumps to the applicable interrupt vector location and
executes the RTI instruction located there (only).
If using your own loader kernel, you must ensure that the RTI
instruction points to the IVT location of the boot peripheral.
Loading the Application
1. Once the kernel is executed (initialization of some core and exter-
nal peripheral registers and such as AMI or SDRAM), the kernel
prepares a DMA for further data.
2. After this the DMA starts and the core waits in IDLE until an
interrupt is generated.
3. The kernel then reads the header data from a memory scratch loca-
tion, decodes the header and configures a loop which loads all of
the header's corresponding data.
4. Step 3 is repeated until all headers are executed.
Loading the Application's Interrupt Vector Table
1. The last header is recognized by the kernel indicating that booting
has nearly finished.
2. The kernel prepares a 256 x 48-word DMA starting at
IVT_START_ADDRESS
23-26
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ADSP-214xx SHARC Processor Hardware Reference
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