EVAL-AD7172-4SDZ User Guide
SOCKETS AND CONNECTORS
Table 2. Connector Details
Connector
Function
J1
Connector to the
J2
External MCLK input
J3
External bench top voltage supply for
the
EVAL-AD7172-4SDZ
J5
External ac to dc adapter input for the
EVAL-AD7172-4SDZ, 7 V to 9 V
J6
Analog input terminal block; wired
connection to external source or sensor
J9
External bench top voltage supply
option for AVDD1/AVDD2, IOVDD, and
AVSS inputs on the
J10
Optional header
J13
Optional header
A0 to A4
Analog inputs to ADC
A7
Pmod™-compatible header
1
Order codes starting with FEC are for Farnell.
SERIAL INTERFACE
The
EVAL-AD7172-4SDZ
connects via the serial peripheral
interface (SPI) to the Blackfin®
CB1Z. There are four input signals: CS , SCLK, DIN, and SYNC ,
and one output signal from the ADC, DOUT/ RDY (see Figure 1).
To operate the
EVAL-AD7172-4SDZ
disconnect the evaluation board from the
controller board. Use the test points labeled on the
AD7172-4SDZ
to connect the signals to an alternative digital
capture setup or the Pmod-compatible header (A7).
Connector Type
EVAL-SDP-CB1Z
120-way connector,
0.6 mm pitch
Straight PCB mount
SMB/SMA jack
Power socket block,
3-pin, 3.81 mm pitch
DC power
connectors, 2 mm
SMT power jack
Power socket block,
8-pin, 3.81 mm pitch
Screw terminal
block, 3.81 mm
AD7172-4
pitch
7-way, 2.54 mm pin
header
7-way, 2.54 mm
socket
Straight PCB mount
SMB/SMA jack
6-pin single inline
header (0.1 inch
pitch)
ADSP-BF527
on the
EVAL-SDP-
in standalone mode,
EVAL-SDP-CB1Z
EVAL-
Manufacturer
Hirose
Tyco
Phoenix Contact
Kycon
Phoenix Contact
Phoenix Contact
Samtec
Samtec
Tyco
Harwin
POWER SUPPLIES
Power the
EVAL-AD7172-4SDZ
connected to J5, or from an external bench top supply applied
to J3 or J9. Linear LDO regulators generate the required
voltages from the applied input voltage (V
or J5. Use J9 to bypass the on-board regulators. An
regulator generates the 5 V (single-supply) and 2.5 V (split
supply) supplies for the AVDD1 and AVDD2 rails to the ADC;
a second
ADP7118
ADP7104
supplies 5 V for the
board as well as 5 V for the
generate −5 V to supply the ADP7182. The
the −2.5 V supply for AVSS when operating in split supply
mode. Each supply is decoupled where it enters the board and
again at each device in accordance with the schematic (available
for download at http://www.analog.com/EVAL-AD7172-4,
including a bill of materials). Table 3 shows the various power
supply configurations available, including split supply
operation.
Rev. 0 | Page 5 of 12
Manufacturer
Number
Order Code
FX8-120S-SV(21)
FEC1324660
1-1337482-0
Not applicable
MC 1,5/ 3-G-3,81
FEC3704737
KLDX-SMT2-
MOUSER 806-
0202-A
KLDX-SMT20202A
MC 1,5/ 8-G-3,81
FEC3704774
MKDS 1/4-3.81
FEC3704592
SSW-107-01-T-S
FEC1803478
TLW-107-05-G-S
FEC1668499
1-1337482-0
Not applicable
20-9990646
FEC 1022255
from the ac to dc adapter
) rail when using J3
IN
generates 3.3 V for the IOVDD rail. The
EVAL-SDP-CB1Z
ADM660
voltage converter to
ADP7182
UG-763
1
ADP7118
controller
generates
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