External Port DMA Register
Table 2-15. External Port DMA Register
Register
External port DMA TCBs
Quad
(DMA channels 0 - 3)
DMA channel 0 source
DCS0
DMA channel 0 destination
DCD0
DMA channel 1 source
DCS1
DMA channel 1 destination
DCD1
DMA channel 2 source
DCS2
DMA channel 2 destination
DCD2
DMA channel 3 source
DCS3
DMA channel 3 destination
DCD3
1 According to Boot Mode strap.
2 DMA registers can be accessed only as quad-words.
AutoDMA Registers
The AutoDMA registers are used to implement a slave mode DMA (see
"Direct Memory Access" on page 7-1). These registers can only be
accessed through multiprocessing memory.
ADSP-TS101 TigerSHARC Processor
Hardware Reference
Memory and Register Map
Direct Memory
Address
0x180400
TCB
0x180401
0x180402
0x180403
0x180404
TCB
0x180405
0x180406
0x180407
0x180408-B
TCB
0x18040C-F
TCB
0x180410-3
TCB
0x180414-7
TCB
0x180418-B
TCB
0x18041C-F
TCB
Reset value
Remarks
0xD300 0000
1, 2
0x0000 0000
0x0100 0004
0x0000 0000 or 0x0
0x5300 0000
1
2
,
0x0000 0000
0x0100 0004
0x0000 0000
2
2
2
2
2
2
2-43
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