Clock Circuitry; Cyclone Iv Gx Transceiver Clock Inputs - Altera Cyclone IV GX Reference Manual

2–16

Clock Circuitry

Cyclone IV GX Transceiver Clock Inputs

Figure 2–5. Cyclone IV GX Transceiver Starter Board Clock Inputs
50 MHz
Table 2–16. Cyclone IV GX Transceiver Starter Board Clock Inputs
Source
Component
Board
Reference
J3
J2
X1.4
X1.5
U14.A13
U14.A14
Cyclone IV GX Transceiver Starter Board Reference Manual
Downloaded from Elcodis.com electronic components distributor
This section describes the board's clock inputs.
Figure 2–5 shows the Cyclone IV GX Transceiver starter board clock inputs.
CMOS
CMOS
Single-Ended
Clock
LVDS
Edge Gold Finger
Table 2–16 shows the clock inputs for the Cyclone IV GX Transceiver starter board.
Schematic Signal
Source Name
SMA or
CLKIN_SMA_P
125 MHz
CLKIN_SMA_N
125M_OCS_P
125M_OCS_N
100 MHz
PCIE_REFCLK_P
PCIE_REFCLK_N
System Controller
EPM2210F256
EP4CGX15F14
Cyclone IV GX
I/O Device
Standard Pin Number
M7 or E7 depending
on CLK_SEL
LVPECL
N7 or E6 depending
on CLK_SEL
M7 or E7 depending
on CLK_SEL
LVDS
N7 or E6 depending
on CLK_SEL
J6
HCSL
J7
Chapter 2: Board Components
Clock Circuitry
125 MHz
LVDS
LVDS
SMA
LVDS
SMA
Source-Select
Switch
Description
Positive and negative differential
LVPECL clock inputs from SMAs.
Positive and negative differential
LVDS clock inputs from 125-MHz
crystal oscillator.
Positive and negative differential
HCSL clock inputs from PCI Express
edge connector.
© March 2010 Altera Corporation