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User Guide
OPERATING THE ADPA1106-EVALZ WITH A PULSED GATE VOLTAGE
To implement gate pulsed operation, apply a negative voltage pulse
to the VGG1 and VGG2 inputs of the
on the VDD1 and VDD2 pins of the ADPA1106 is held constant.
SETUP
All power supply, ground, and control signals are applied to the P4
and P5 headers of the ADPA1106-EVALZ. For this mode of opera-
tion, pulse the gate voltage between −4 V (off) and approximately
−2.3 V (on) to set the quiescent current (I
300 mA. The pulse width and duty cycle must be approximately
100 µs and 10%, respectively.
OPERATION
Take the following steps to power up the ADPA1106-EVALZ:
1. Set VDDx (Pin 4, Pin 6, and Pin 8 of P5) to 0 V.
2. Set VGGx (Pin 6, Pin 8, and Pin 10 of P4) to off (VGG1 =
VGG2 = −4 V).
3. Set the supply voltage (V
DD
4. Turn on the gate voltage pulse (VGG1 and VGG2 pulsing
between −4 V and approximately −2.3 V).
5. Fine tune the pulse high voltage to achieve the desired I
(nominally 300 mA) while maintaining the pulse off voltage level
at −4 V.
6. Apply the RF input signal.
Take the following steps to power down the ADPA1106-EVALZ:
1. Turn off the RF signal.
2. Turn off the pulse to VGG1 and VGG2 (VGG1 = VGG2 = −4 V).
3. Set V
to 0 V.
DD
4. Increase the pulse to VGG1 and VGG2 to 0 V.
analog.com
ADPA1106
while the voltage
) to approximately
DQ
) to 50 V.
DQ
EVAL-ADPA1106
Rev. 0 | 6 of 13
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