Special 32-Bit Integer Mac Instruction - Analog Devices ADSP-BF53x Blackfin Reference

Multiply Accumulators (Multipliers)
A0.X
A0 0000 0000
Destination
Register
A1.X
A1 0000 0000
Destination
Register
Figure 2-13. Multiplication of Integer Operands

Special 32-Bit Integer MAC Instruction

The processor supports a multicycle 32-bit MAC instruction:
Dreg *= Dreg
The single instruction multiplies two 32-bit integer operands and provides
a 32-bit integer result, destroying one of the input operands.
The instruction takes multiple cycles to execute. For more information
about the exact operation of this instruction, refer to
metic Operations."
modify the data in either Accumulator register
2-46 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
A0.H
XXXX XXXX XXXX XXXX
XXXX XXXX XXXX XXXX
A1.H
XXXX XXXX XXXX XXXX
XXXX XXXX XXXX XXXX
This macro function is interruptable and does not
A0.L
XXXX XXXX XXXX XXXX
XXXX XXXX XXXX XXXX
A1.L
XXXX XXXX XXXX XXXX
XXXX XXXX XXXX XXXX
Chapter 15, "Arith-
or .
A0 A1