Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 1054

DPI Signal Routing Unit Registers
31 30
DPI_PBEN14_I (23–18)
DPI Pin Buffer Enable 14 Input
15
DPI_PBEN13_I (17–12)
DPI Pin Buffer Enable 13 Input
DPI_PBEN12_I (11–6)
DPI Pin Buffer Enable 12 Input
Figure A-129. SRU2_PBEN2 Register
Table A-120. Group C Signals
Binary
000000 (0x0)
000001 (0x1)
000010 (0x2)
000011 (0x3)
000100 (0x4)
000101 (0x5)
000110 (0x6)
000111 (0x7)
001000 (0x8)
001001 (0x9)
001010 (0xA)
001011 (0xB)
001100 (0xC)
001101 (0xD)
001110 (0xE)
001111 (0xF)
A-228
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29 28 27 26 25 24
14 13 12 11 10 9 8
Signal
LOW
HIGH
MISCB0_O
MISCB1_O
MISCB2_O
TIMER0_PBEN_O
TIMER1_PBEN_O
Reserved
UART0_TX_PBEN_0
Reserved
SPIMISO_PBEN_O
SPIMOSI_PBEN_O
SPICLK_PBEN_O
SPIFLG0_PBEN_O
SPIFLG1_PBEN_O
SPIFLG2_PBEN_O
ADSP-214xx SHARC Processor Hardware Reference
23 22 21 20 19 18 17 16
7 6 5 4 3 2 1 0
Description (Source Selection)
Logic Level Low (0)
Logic Level High (1)
Miscellaneous Control 0
Miscellaneous Control 1
Miscellaneous Control 2
Enable for Timer 0 Output
Enable for Timer 1 Output
Pin Enable for UART 0 Transmitter
Pin Enable for MISO from SPI
Pin Enable for MOSI from SPI
Pin Enable for CLK from SPI
Pin Enable for Slave Select 0 from SPI
Pin Enable for Slave Select 1 from SPI
Pin Enable for Slave Select 2 from SPI
DPI_PBEN13_I (17–12) con't
DPI Pin Buffer Enable 13
Input
DPI_PBEN11_I (5–0)
DPI Pin Buffer Enable 11
Input