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OUTPUTS
SHUTDOWN OUTPUT, SHDN
The shutdown output, SHDN , is triggered by V
over- or underthreshold values, or as the result of a failed
watchdog input. SHDN can also be asserted low at any time
by writing to certain registers on the AD5100.
The shutdown generator asserts a logic low SHDN signal based
on the following conditions:
•
During power-up
•
When V
goes over or under the threshold (see Figure 7)
1MON
•
When V
is below the turn-on threshold during the
2MON
rising edge or the turn-off threshold during the falling
edge in level-sensitive mode (see Figure 7)
•
When the external monitoring processor cannot issue
the necessary WDI signal and advanced WDI mode is
selected (see Figure 10 and Figure 9)
•
2
I
C® programmed shutdown
To activate SHDN by writing to the part, the user must first
enable this feature by writing to Register 0x18[4].
•
Register 0x18[4] = 0: enable software control of SHDN
•
Register 0x18[4] = 1: disable software control of SHDN
Once the feature is enabled, control of SHDN is achieved by
writing to Register 0x16[2].
•
Register 0x16[2] = 0: SHDN output not controlled by
software
•
Register 0x16[2] = 1: SHDN output is pulled low
The SHDN signal is released after the programmable hold time,
. The SHDN output is push-pull configured with an I
t
SD_HOLD
selectable rail voltage of either V
Register 0x0E[3] controls the voltage rail for SHDN . This bit
can be fixed in OTP memory.
•
Register 0x0E[3] = 0: SHDN uses V
•
Register 0x0E[3] =1: SHDN uses V
Figure 16 shows the SHDN output configuration. Pull-down
Resistor R1 ensures that SHDN is pulled to ground when the
AD5100 is not powered. When AD5100 is powered, M2a and
M2b are both on. M2a has relatively lower impedance than
M2b and R1 so the SHDN remains low at shutdown. When
the AD5100 settles, SW1 is turned on. M1 is stronger than
M2a so SHDN is pulled to the rail, which takes AD5100 out
of the shutdown mode.
In some applications, the AD5100 may monitor and control
power regulators where the input and enable pins are next to
each other in a fine pitch. This may pose reliability concerns
under some abnormal conditions. To prevent errors from happen-
ing, the AD5100 shutdown output features smart-load detection
to ensure that the shutdown responds. For example, if the car
battery has not started for a long time, a resistive dendrite may
or V
1MON
2MON
2
in default or internal V
1MON
REG
rail (Default)
1MON
rail
REG
Rev. A | Page 19 of 36
have formed across the SHDN pin and the battery terminal
(V
). The dendrite is blown immediately because M2a is
1MON
designed with adequate current sinking capability and remains
in the on position to offer such protection. In another situation,
if the SHDN pin is hard-shorted to the 12 V battery, the short-
circuit detector opens SW2 and limits the current by the high
impedance M2b.
# *
SW1
*
SW2
NOTES
2
1. # = I
C SELECTABLE
2. * = DEFAULT
RESET OUTPUT, RESET
The reset output, RESET , is triggered by V
underthreshold values. RESET activation can also be the result
of the processor not generating the proper watchdog signal, if
MR input is triggered, or if SHDN is activated.
The reset generator asserts the RESET signal based on the
following conditions:
C-
•
.
During power-up
•
When V
3MON
•
When V
4MON
•
When SHDN output is asserted (see
RESET follows SHDN hold and delay timings if triggered by
the SHDN output
•
When the external monitoring processor cannot issue the
necessary WDI signal (see Figure 13 and Figure 14)
•
When MR is asserted (see
RESET is active low by default, but can be configured for active
high operation. Register 0x0D[1] controls the activation
polarity of RESET . It is possible to fix the value of this bit in
OTP memory.
•
Register 0x0D[1] = 0: RESET is active low (Default)
•
Register 0x0D[1] = 1: RESET is active high
V
V
1MON
#
LEVEL
M1
SHIFTER
SW3
M2A
M2B
LOW-Z
HIGH-Z
SHORT-CIRCUIT
DETECT
Figure 16. Shutdown Output
3MON
drops below the threshold (see Figure 10)
drops below the threshold (see Figure 12)
Figure 7
Figure 15
)
AD5100
REG
M3
SHDN
R1
or V
4MON
and
Figure 14
);
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