Case #1: Complementary Register Pair Data Move; Example 1: Register-To-Memory Move - Pex Explicit Register - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

Case #1: Complementary Register Pair Data Move

In this case, data moves from a complementary register pair to a comple-
mentary register pair. The DSP executes the explicit move depending on
the evaluation of the conditional test in the PEx processing element and
the implicit move depending on the evaluation of the conditional test in
the PEy processing element. For example:
IF EQ DM(I0,M0) = R2;
Example 1: Register-to-Memory Move – PEx Explicit Register
For this instruction, the DSP is operating in SIMD mode, a register in the
PEx data register file is the explicit register, and
address in internal memory. Indirect addressing is shown in the instruc-
tions in the example. However, the same results occur using direct
addressing. The data movement resulting from the evaluation of the con-
ditional test in the PEx and PEy processing elements is shown in
Table 3-15.
The moves from the DAG registers to the memory also behave in a similar
manner, as demonstrated in
If EQ pm(i0,m0) = m15;
Table 3-15. Register-to-Memory Moves—Complementary Pairs
Condition Condition
in PEx in PEy
AZx AZy
0 0
0 1
1 0
1 1
ADSP-2126x SHARC Processor Hardware Reference
Table 3-15. For example:
Result
Explicit
No data move occurs
No data move occurs from r2 to
location I0
r2 transfers to location I0
r2 transfers to location I0
Program Sequencer
is pointing to an even
I0
Implicit
No data move occurs
s2 transfers to location (I0+1)
No data move occurs from s2 to
location (I0+1)
s2 transfers to location (I0+1)
3-39