Timer Address Map And Register Definitions; Document Revision History - Altera Cyclone V Device Handbook

cv_54023
2013.12.30

Timer Address Map and Register Definitions

The address map and register definitions reside in the hps.html file that accompanies this handbook volume.
Click the link to open the file.
To view the module description and base address, scroll to and click the link for any of the following module
instances:
• osc1timer0
• osc1timer1
• sptimer0
• sptimer1
To then view the register and field descriptions, scroll to and click the register names. The register addresses
are offsets relative to the base address of each module instance.
Related Information
• Introduction to Cyclone V Hard Processor System (HPS)
For more information, refer to the Introduction to the Hard Processor System chapter.
• hps.html
For more information, refer to this hps.html chapter of the Cyclone V Device Handbook.

Document Revision History

Table 23-2: Document Revision History
Date
December 2013
November 2012
May 2012
January 2012
Timer Introduction
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Version
2013.12.30
1.2
1.1
1.0
Timer Address Map and Register Definitions
on page 1-1
Minor formatting upates
Minor updates.
Added programming model and
address map and register
definitions sections.
Initial release.
23-5
Changes
Altera Corporation