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System Architecture
System Architecture
This section describes the configuration of the extender board. A simpli-
fied block diagram of the board is shown in
Buffered SPI Signals: MISO, MOSI, SCK, CSEL
PPI Data, 16 bits
FS1, FS2
PPICLK
Oscillator
Figure 2-1. ADSP-BF53x EZ Extender 1 Block Diagram
The ADSP-BF53x EZ-Extender 1 consists of:
• Three EZ-KIT Lite expansion interface connectors (
• Two High-Speed Converter (HSC) interface connectors (
2-2
Bidirectional
Buffer
Direction
Control
Clock
Circuit
External Clock Source
ADSP-BF53x EZ-Extender 1 Manual
Figure
2-1.
DATA
FS1, FS2
TxCLK
RxCLK
P1
,
, and
)
P2
P3
and
)
J3
J4
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