Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1092

ADSP-SC58x TIMER Register Descriptions
Run Clear Register
The
TIMER_RUN_CLR
TIMER_RUN register without affecting other bits in TIMER_RUN. To stop a particular timer, software must write a
1 into the corresponding
only register, the result of any write to this register must be checked by reading the
the TIMER_RUN_CLR
Note that the stopping mechanism of a timer may be abrupt or graceful (after completion of current waveform peri-
od) depending on the selection in the
Figure 20-18: TIMER_RUN_CLR Register Diagram
Table 20-30: TIMER_RUN_CLR Register Fields
Bit No.
(Access)
7:0 TMR[nn]
(R0/W1C)
20–34
register is an alias register, providing a mechanism to clear a specific start/stop bit in the
TIMER_RUN_CLR bit. Writing a 0 has no effect. Because
returns 0x0000.
TIMER_STOP_CFG
15 14
0 0
TMR[nn] (R/W)
Start/Stop Timer n
Bit Name
RUN Clear Alias.
For all TIMER_RUN_CLR.TMR[nn] bits, write =0 has no effect, and write =1 for
stop (clearing the corresponding in start/stop bit in the
TIMER_RUN_CLR
fluencing run status of other timers.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register.
13 12 11 10 9 8 7 6
0 0 0 0 0 0 0 0
Description/Enumeration
to clear start/stop bits permits stopping specific timers without in-
TIMER_RUN_CLR
TIMER_RUN
5 4 3 2 1 0
0 0 0 0 0 0
TIMER_RUN
is a write-
register. A read of
register). Using