Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1085

Sharc+ processor
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Broadcast Period Register
For timers with TIMER_TMR[n]_CFG.BPEREN enabled, a write to the
rently updates the period (TIMER_TMR[n]_PER) registers of only those timers. A read of
returns 0x00000000, and no bus error is generated. To read back a written value, read that TMR's
TIMER_TMR[n]_PER
VALUE[31:16] (R0/W)
Broadcast Period Value
Figure 20-12: TIMER_BCAST_PER Register Diagram
Table 20-24: TIMER_BCAST_PER Register Fields
Bit No.
(Access)
31:0
VALUE
(R0/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register.
15
0
VALUE[15:0] (R0/W)
Broadcast Period Value
31
0
Bit Name
Broadcast Period Value.
A write to the TIMER_BCAST_PER.VALUE bit field concurrently updates the peri-
od (TIMER_TMR[n]_PER) registers of only those timers. A read of the
TIMER_BCAST_PER.VALUE bit fields returns 0x0000 0000, and no bus error is
generated.
14
13
12
11
10
9
8
7
0
0
0
0
0
0
0
0
30
29
28
27
26
25
24
23
0
0
0
0
0
0
0
0
Description/Enumeration
ADSP-SC58x TIMER Register Descriptions
TIMER_BCAST_PER
TIMER_BCAST_PER
6
5
4
3
2
1
0
0
0
0
0
0
0
0
22
21
20
19
18
17
16
0
0
0
0
0
0
0
register concur-
20–27

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