Sdram Memory (U39 & U40) - Altera Stratix II Reference Manual

Board Components & Interfaces
Altera Corporation
August 2006
Table 19. Flash Memory (U17) (Part 2 of 2)
Pin Name
FLASH_CS_N
FLASH_OE_N
FLASH_RW_N
flash_WP_n
Table 20 lists the reference information for the Flash memory.
Table 20. Flash Memory Reference
Item
Board reference
Device description
SDRAM Memory (U39 & U40)
The SDRAM devices (U39 and U40) are memory devices with PC100
functionality and self refresh mode. The SDRAM is fully synchronous
with all signals registered on the positive edge of the system clock.
The SDRAM device pins are connected to the Stratix II device. An
SDRAM controller peripheral is included with the Stratix II DSP
Development Kit, allowing a Nios II processor to view the SDRAM
devices as a large, linearly-addressable memory.
Table 21 lists the Stratix II device pin-outs for SDRAM device U39.
Table 21. SDRAM Device (U39) Pin-Outs (Part 1 of 3)
Pin Name Pin Number Connects to Stratix II Pin
A0
A1
A2
A3
A4
A5
A6
A7
Reference Manual
Pin Number
AA32
AA31
W32
Y30
Description
U17
Flash Memory
25 AD11
26 AD13
27 AB13
60 AE14
61 AB14
62 AC14
63 AD14
64 AE10
Stratix II Development Board
2–21