Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 99

Chapter 1
MPC885 Overview
The MPC885 PowerQUICC™ family is a 0.18-micron version of the MPC860 PowerQUICC family and
can operate at speeds of up to 120 MHz (2:1 mode) on the MPC8xx core and up to 80 MHz (1:1 mode) on
the external bus. The MPC885 family has a 1.8-V core and 3.3-V I/O operation with 5-V TTL
compatibility. The MPC885 integrated communications controller family is a versatile one-chip integrated
microprocessor and peripheral combination that can be used in a variety of controller applications. It
particularly excels in both communications and networking systems. The MPC885 contains a PowerPC™
processor core.
The MPC885 family is a PowerPC-architecture-based quad integrated communications controller
(PowerQUICC). The CPU on the MPC885 is the MPC8xx core, a 32-bit microprocessor which
implements the PowerPC architecture, incorporating memory management units (MMUs) and instruction
and data caches. The MPC885 is the superset of this family of devices and is mainly described in this
document.
Table 1-1 shows the functionality supported by the members of the MPC885 family:
Cache
Part
I Cache D Cache 10BaseT (SCC)
MPC885 8 Kbyte 8 Kbyte
MPC880 8 Kbyte 8 Kbyte
MPC875 8 Kbyte 8 Kbyte
MPC870 8 Kbyte 8 Kbyte
1
The SCC may be used if any one of the FECs is not used.
Freescale Semiconductor
Table 1-1. MPC885 Family
Ethernet
10/100 (FEC)
Up to 3 2
Up to 2 2
Up to 1 2
— 2
MPC885 PowerQUICC Family Reference Manual, Rev. 2
SCC SMC USB ATM Support
3 2 1 Serial ATM and
UTOPIA interface
2 2 1 Serial ATM and
UTOPIA interface
1
1 1 1 –
— 1 1 –
Security
Engine
Yes
No
Yes
No
1-1