Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 792

Powerquicc family
Table of Contents

Advertisement

SCC Transparent Mode
0
Field
Reset
R/W
Addr
Figure 28-5. SCC Status Register in Transparent Mode (SCCS)
Table 28-10
describes SCCS fields.
Bit
Name
0–5
Reserved, should be cleared.
6
CS
Carrier sense (DPLL). Shows the real-time carrier sense of the line as determined by the DPLL.
0 The DPLL does not sense a carrier.
1 The DPLL senses a carrier.
7
Reserved, should be cleared.
28.13 SCC2 Transparent Programming Example
The following initialization sequence enables the transmitter and receiver, which operate independently of
each other. The sequence implements the connection shown for MPC885(B) in
transparent controller is configured with RTS2 and CD2 active, and CTS2 is configured to be grounded
internally in port C. CLK3 externally provides the transmit and receive clocks. A 16-bit CRC-CCITT is
sent with each transparent frame. The FIFOs are configured for fast operation.
1. Configure port A to enable TXD2 and RXD2. Set PAPAR[12,13] and clear PADIR[12,13] and
PAODR[12,13].
2. Configure port C to enable RTS2, CTS2, and CD2. Set PCPAR[14] and PCSO[8,9] and clear
PCPAR[8,9] and PCDIR[8,9,14].
3. Configure port A to enable CLK3.Set PAPAR[5] and clear PADIR[5].
4. Connect CLK3 to SCC2 using the SI. Write 0b110 to SICR[R2CS] and SICR[T2CS].
5. Connect the SCC2 to the NMSI (its own set of pins) and clear SICR[SC2].
6. Initialize the SDMA configuration register (SDCR) to 0x0001.
7. Write RBASE with 0x0000 and TBASE with 0x0008 in the SCC2 parameter RAM to point to one
RxBD at the beginning of dual-port RAM followed by one TxBD.
8. Write 0x0041 to CPCR to execute the
updates RBPTR and TBPTR of the serial channel with the new values of RBASE and TBASE.
9. Write RFCR and TFCR with 0x10 for normal operation.
10. Write MRBLR with the maximum number of bytes per receive buffer and assume 16-bytes, so
MRBLR = 0x0010.
11. Write CRC_P with 0x0000_FFFF to comply with the 16-bit CRC-CCITT.
12. Write CRC_C with 0x0000_F0B8 to comply with the 16-bit CRC-CCITT.
28-12
0000_0000
0xA37 (SCCS2), 0xA57 (SCCS3), 0xA77 (SCCS4)
Table 28-10. SCCS Field Descriptions
INIT RX AND TX PARAMS
MPC885 PowerQUICC Family Reference Manual, Rev. 2
5
R
Description
command for SCC2. This command
6
7
CS
Figure
28-1. The
Freescale Semiconductor

Advertisement

Table of Contents
loading

This manual is also suitable for:

Powerquicc mpc870Powerquicc mpc880Powerquicc mpc875

Table of Contents