Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 958

• Chapter 44, "AAL2 Implementation,"
layer 2.
Conventions
This document uses the following notational conventions:
Bold entries in figures and tables showing registers and parameter RAM should
Bold
be initialized by the user.
mnemonics Instruction mnemonics are shown in lowercase bold.
italics Italics indicate variable command parameters, for example, bcctrx.
Book titles in text are set in italics.
0x0 Prefix to denote hexadecimal number
0b0 Prefix to denote binary number
rA, rB Instruction syntax used to identify a source GPR
rD Instruction syntax used to identify a destination GPR
REG[FIELD] Abbreviations or acronyms for registers or buffer descriptors are shown in
uppercase text. Specific bits, fields, or numerical ranges appear in brackets. For
example, MSR[LE] refers to the little-endian mode enable bit in the machine state
register.
x In certain contexts, such as in a signal encoding or a bit field, indicates a don't
care.
n Indicates an undefined numerical value
¬ NOT logical operator
& AND logical operator
| OR logical operator
Acronyms and Abbreviations
Table VI-1 contains acronyms and abbreviations used in this document. Note that the meanings for some
acronyms (such as SDR1 and DSISR) are historical, and the words for which an acronym stands may not
be intuitively obvious.
Term
AAL ATM adaptation layer
AAL5 CPCS–PDU
ABR Available bit rate
ACR Allowed cell rate
ALU Arithmetic logic unit
VI-2
describes how the MPC885 implements ATM adaptation
Table VI-1. Acronyms and Abbreviated Terms
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Meaning
Freescale Semiconductor