Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 482

Memory Controller
UPMA
UPMB
GPCM
15.6.4.3 Byte-Select Signals (BST x )
BRx[MS] of the accessed memory bank selects a UPM on the currently requested cycle. The selected UPM
affects only the assertion and negation of the appropriate BS signal; its timing as specified in the RAM
word. The state of each BS[0:3] signal depends on the value of each BSTx bit and the values of BRx[PS],
TSIZn, and A[30:31] in the current cycle.The BS signals are also controlled by the port size of the accessed
bank, the transfer size of the transaction, and the address accessed.
BS signals.
UPMA
UPMB
15-42
Bank Selected
MS[0–1] in BRx
MUX
MS[0–1] Machine
00 GPCM
01 –
10 UPMA
11 UPMB
Figure 15-40. CS x Signal Selection
Bank Selected
MS[0–1] in BRx PS[0–1] in BRx
MUX
Figure 15-41. BS x Signal Selection
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Switch CS0
CS1
CS2
CS3
CS4
CS5
CS6
CS7
Figure 15-41 shows how UPMs control
A[30:31]
TSIZ[0:1]
BS0
BS1
Byte-Select
Logic
BS2
BS3
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