Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 345

Table 12-1. MPC885/MPC880 Signal Descriptions (continued)
Hard
Name
Reset
PA[3] Hi-Z
MII1-RXER
RMII1-RXER
BRGO3
PA[2] Hi-Z
MII1-RXDV
RMII1-CRS_DV
TXD4
PA[1] Hi-Z
MII1-RXD0
RMII1 -RXD0
BRGO4
PA[0] Hi-Z
MII1-RXD1
RMII1-RXD1
TOUT4
PB[31] Hi-Z
SPISEL
MII1 - TXCLK
RMII1-REFCLK
PB[30] Hi-Z
SPICLK
PB[29] Hi-Z
SPIMOSI
PB[28] Hi-Z
SPIMISO
BRGO4
PB[27] Hi-Z
I2CSDA
BRGO1
Freescale Semiconductor
Number Type
W2 Bidirectional General-Purpose I/O Port A Bit 3—Bit 3 of the general-purpose
I/O port A
MII1-RXER —Media-independent interface 1, receive error
RMII1-RXER—Reduced media-independent interface 1, receive
error
BRGO3—Output clock of BRG3
T4 Bidirectional General-Purpose I/O Port A Bit 2—Bit 2 of the general-purpose
I/O port A
MII1-RXDV—Media-independent interface 1, receive data valid
RMII1-CRS_DV—Reduced MII 1, carrier receive sense or data
valid
TXD4—Transmit data for serial channel 4
U1 Bidirectional General-Purpose I/O Port A Bit 1—Bit 1 of the general-purpose
I/O port A
MII1-RXD0—Media-independent interface 1, receive data 0
RMII1-RXD0—Reduced media-independent interface 1, receive
data 0
BRGO4—BRG4 output clock
U3 Bidirectional General-Purpose I/O Port A Bit 0—Bit 0 of the general-purpose
I/O port A
MII1-RXD1—Media-independent interface 1, receive data 1
RMII1-RXD1—Reduced media-independent interface 1, receive
data 1
TOUT4—Timer 4 output
V3 Bidirectional General-Purpose I/O Port B Bit 31—Bit 31 of the general-purpose
(optional: I/O port B
open-drain) SPISEL—SPI slave select input
MII1-TXCLK—Media-independent interface 1, transmit clock
RMII1-REFCLK—Reduced media-independent interface 1,
reference clock
P18 Bidirectional General-Purpose I/O Port B Bit 30—Bit 30 of the general-purpose
(optional: I/O port B
open-drain) SPICLK—SPI output clock when it is configured as a master or
SPI input clock when it is configured as a slave.
T19 Bidirectional General-Purpose I/O Port B Bit 29—Bit 29 of the general-purpose
(optional: I/O port B
open-drain) SPIMOSI—SPI output data when it is configured as a master or
SPI input data when it is configured as a slave
V19 Bidirectional General-Purpose I/O Port B Bit 28—Bit 29 of the general-purpose
(optional: I/O port B
open-drain) SPIMISO—SPI input data when the MPC885 is a master; SPI
output data when it is a slave
BRGO4—BRG4 output clock
U19 Bidirectional General-Purpose I/O Port B Bit 27—Bit 27 of the general-purpose
(optional: I/O port B
open-drain) I2CSDA—I
as an open-drain output
BRGO1—BRG1 output clock
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Description
2
C serial data pin. Bidirectional; should be configured
External Signals
12-15