Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 175

error handler (a program exception). See
information about illegal and invalid instruction exceptions.
The following types of instructions are included in this class:
• Implementation-specific instructions
• Optional instructions defined by the architecture but not implemented by the MPC885 (for
example, Floating Square Root (fsqrt) and Floating Square Root Single (fsqrts) instructions)
5.2.2 Addressing Modes
This section provides an overview of conventions for addressing memory and for calculating effective
addresses. For more detailed information, see "Conventions," in Chapter 4, "Addressing Modes and
Instruction Set Summary," of the Programming Environments Manual.
5.2.2.1 Memory Addressing
A program references memory using the effective (logical) address computed by the processor when it
executes a memory access or branch instruction or when it fetches the next sequential instruction.
5.2.2.2 Effective Address Calculation
An effective address (EA) is the 32-bit sum computed by the processor when executing a memory access
or branch instruction or when fetching the next sequential instruction. For a memory access instruction, if
the sum of the effective address and the operand length exceeds the maximum effective address, the
memory operand is considered to wrap around from the maximum effective address through effective
address 0, as described in the following paragraphs.
Effective address computations for both data and instruction accesses use 32-bit unsigned binary
arithmetic. A carry from bit 0 is ignored.
Load and store operations have three categories of effective address generation:
• Register indirect with immediate index mode
• Register indirect with index mode
• Register indirect mode
Refer to Section 5.2.4.2.1, "Integer Load and Store Address Generation,"
effective address generation for load and store operations.
Branch instructions have three categories of effective address generation:
• Immediate
• Link register indirect
• Count register indirect
Refer to Section 5.2.4.3.1, "Branch Instruction Address Calculation,"
instruction effective address generation.
Freescale Semiconductor
Section 6.1.2.7, "Program Exception (0x00700),"
MPC885 PowerQUICC Family Reference Manual, Rev. 2
MPC885 Instruction Set
for additional
for further discussion of
for further discussion of branch
5-5