Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 26

Paragraph
Number
25.12 Handling Errors in the Asynchronous HDLC Controller .............................................. 25-7
25.13 SCC Asynchronous HDLC Registers ............................................................................ 25-8
25.13.1 Asynchronous HDLC Event Register (SCCE)/Asynchronous HDLC Mask
Register (SCCM) ................................................................................................... 25-8
25.13.2 SCC Asynchronous HDLC Status Register (SCCS) ................................................. 25-9
25.13.3 Asynchronous HDLC Mode Register (PSMR) ....................................................... 25-10
25.14 SCC Asynchronous HDLC RxBDs ............................................................................. 25-10
25.15 SCC Asynchronous HDLC TxBDs ............................................................................. 25-12
25.16 Differences between HDLC and Asynchronous HDLC.............................................. 25-13
25.17 SCC Asynchronous HDLC Programming Example.................................................... 25-13
25.18 IrDA Encoder/Decoder (SCC2 Only).......................................................................... 25-14
26.1 Features .......................................................................................................................... 26-2
26.2 SCC BISYNC Channel Frame Transmission ................................................................ 26-2
26.3 SCC BISYNC Channel Frame Reception ..................................................................... 26-3
26.4 SCC BISYNC Parameter RAM ..................................................................................... 26-3
26.5 SCC BISYNC Commands ............................................................................................. 26-5
26.6 SCC BISYNC Control Character Recognition.............................................................. 26-6
26.7 BISYNC SYNC Register (BSYNC).............................................................................. 26-7
26.8 SCC BISYNC DLE Register (BDLE) ........................................................................... 26-8
26.9 Sending and Receiving the Synchronization Sequence ................................................. 26-8
26.10 Handling Errors in the SCC BISYNC ........................................................................... 26-9
26.11 BISYNC Mode Register (PSMR)................................................................................ 26-10
26.12 SCC BISYNC Receive BD (RxBD) ............................................................................ 26-11
26.13 SCC BISYNC Transmit BD (TxBD)........................................................................... 26-13
26.14 BISYNC Event Register (SCCE)/BISYNC Mask Register (SCCM).......................... 26-14
26.15 SCC Status Registers (SCCS)...................................................................................... 26-15
26.16 Programming the SCC BISYNC Controller ................................................................ 26-16
26.17 SCC BISYNC Programming Example ........................................................................ 26-17
27.1 Ethernet on the MPC885................................................................................................ 27-2
27.2 Features .......................................................................................................................... 27-3
27.3 Learning Ethernet on the MPC885 ................................................................................ 27-4
27.4 Connecting the MPC885 to Ethernet ............................................................................. 27-5
27.5 SCC Ethernet Channel Frame Transmission ................................................................. 27-6
xxvi
Contents
Title
Chapter 26
SCC BISYNC Mode
Chapter 27
SCC Ethernet Mode
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Page
Number
Freescale Semiconductor