Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 27

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Number
27.6 SCC Ethernet Channel Frame Reception....................................................................... 27-7
27.7 SCC Ethernet Parameter RAM ...................................................................................... 27-8
27.8 Programming the Ethernet Controller.......................................................................... 27-10
27.9 SCC Ethernet Commands ............................................................................................ 27-10
27.10 SCC Ethernet Address Recognition............................................................................. 27-11
27.11 Hash Table Algorithm.................................................................................................. 27-12
27.12 Interpacket Gap Time................................................................................................... 27-13
27.13 Handling Collisions ..................................................................................................... 27-13
27.14 Internal and External Loopback................................................................................... 27-13
27.15 Full-Duplex Ethernet Support...................................................................................... 27-14
27.16 Handling Errors in the Ethernet Controller.................................................................. 27-14
27.17 Ethernet Mode Register (PSMR) ................................................................................. 27-15
27.18 SCC Ethernet Receive Buffer Descriptor .................................................................... 27-16
27.19 SCC Ethernet Transmit Buffer Descriptor................................................................... 27-19
27.20 SCC Ethernet Event Register (SCCE)/Mask Register (SCCM) .................................. 27-20
27.21 SCC Ethernet Programming Example ......................................................................... 27-22
28.1 Features .......................................................................................................................... 28-1
28.2 SCC Transparent Channel Frame Reception Process .................................................... 28-2
28.3 Achieving Synchronization in Transparent Mode ......................................................... 28-2
28.3.1 Synchronization in NMSI Mode................................................................................ 28-3
28.3.1.1 In-Line Synchronization Pattern............................................................................ 28-3
28.3.1.2 External Synchronization Signals.......................................................................... 28-3
28.3.1.2.1 External Synchronization Example ................................................................... 28-4
28.3.1.3 Transparent Mode without Explicit Synchronization ............................................ 28-4
28.3.1.4 End of Frame Detection......................................................................................... 28-5
28.3.2 Synchronization and the TSA .................................................................................... 28-5
28.3.2.1 In-line Synchronization Pattern ............................................................................. 28-5
28.3.2.2 Inherent Synchronization....................................................................................... 28-5
28.4 CRC Calculation in Transparent Mode.......................................................................... 28-5
28.5 SCC Transparent Parameter RAM................................................................................. 28-6
28.6 SCC Transparent Commands......................................................................................... 28-6
28.7 Handling Errors in the Transparent Controller .............................................................. 28-7
28.8 Transparent Mode and the PSMR.................................................................................. 28-7
28.9 SCC Transparent Receive Buffer Descriptor (RxBD) ................................................... 28-8
28.10 SCC Transparent Transmit Buffer Descriptor (TxBD).................................................. 28-9
28.11 SCC Transparent Event Register (SCCE)/Mask Register (SCCM)............................. 28-10
Freescale Semiconductor
Contents
Title
Chapter 28
SCC Transparent Mode
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Page
Number
xxvii