Table 2-2. Security Engine Memory Map (IMMR[14–15]=10) (continued)
SEC Lite
SEC Lite Address
02010
Channel
02018–0203F
Reserved
02040
Channel
02048
Channel
02050–0207F
Reserved
02080–020BF
Channel
020C0–03FFF
Reserved
04000
AESU
04008
AESU
04010
AESU
04018
AESU
04020–04027
Reserved
04028
AESU
04030
AESU
04038
AESU
04040–0404F
Reserved
04050
AESU
04058–040FF
Reserved
04100
AESU
04108–043FF
Reserved
04400–04408
AESU
0440C–047FF
Reserved
04800–04FFF
AESU
05000
DEU
05008
DEU
05010
DEU
05018
DEU
05020–05027
Reserved
05028
DEU
05030
DEU
05038
DEU
05040–0504F
Reserved
Freescale Semiconductor
Description
Module
Pointer status
Current descriptor pointer
Fetch register
Descriptor buffer[16]
Mode register
Key size register
Data size register
Reset control register
Status register
Interrupt status register
Interrupt control register
End of message register
IV register
Key memory
FIFO
Mode register
Key size register
Data size register
Reset control register
Status register
Interrupt status register
Interrupt control register
MPC885 PowerQUICC Family Reference Manual, Rev. 2
1
Size
Section/Page
64 bits
50.1.2/50-4
40 bytes
—
64 bits
50.1.3/50-10
64 bits
50.1.4/50-11
48 bytes
—
64 bytes
50.1.5/50-12
8000 bytes
—
64 bits
48.3.2/48-24
64 bits
48.3.3/48-26
64 bits
48.3.4/48-27
64 bits
48.3.5/48-28
8 bytes
—
64 bits
48.3.6/48-29
64 bits
48.3.7/48-30
64 bits
48.3.8/48-32
16 bytes
—
64 bits
48.3.9/48-34
168 bytes
—
64 bits
48.3.9.1/48-34
760 bytes
—
12 bytes
48.3.9.4/48-36
1012 bytes
—
2048 bytes
48.3.9.5/48-36
64 bits
48.1.2/48-2
64 bits
48.1.3/48-3
64 bits
48.1.4/48-4
64 bits
48.1.5/48-5
8 bytes
—
64 bits
48.1.6/48-6
64 bits
48.1.7/48-7
64 bits
48.1.8/48-9
16 bytes
—
Memory Map
2-15