Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 933

0
Field —
Reset
R/W
Addr
This register is affected by HRESET but is not affected by SRESET.
Bits Name
0–3 — Reserved
4–15 DR n Port C data direction. Configures port C signals as inputs or outputs when functioning as
general-purpose I/O; otherwise, used with PCSO to select the peripheral function.
0 Select the signal for general-purpose input, or select peripheral function 0.
1 Select the signal for general-purpose output, or select peripheral function 1.
34.4.1.3 Port C Pin Assignment Register (PCPAR)
The port C pin assignment register (PCPAR) configures signals as general-purpose I/O or dedicated for
use with a peripheral.
0
Field —
Reset
R/W
Addr
This register is affected by HRESET but is not affected by SRESET.
Bits Name
0–3 — Reserved.
DD n
4–15 Configures a signal for general-purpose I/O or for dedicated peripheral function
0 General-purpose I/O. The peripheral functions of the signal are not used.
1 Dedicated peripheral function. The signal is used by the internal module. The on-chip peripheral
function to which it is dedicated can be determined by other bits.
Freescale Semiconductor
3 4 5 6
DR4 DR5 DR6
0000_0000_0000_0000
Figure 34-12. Port C Data Direction Register (PCDIR)
Table 34-14. PCDIR Bit Descriptions
3 4 5 6
DD4 DD5 DD6
0000_0000_0000_0000
Figure 34-13. Port C Pin Assignment Register (PCPAR)
Table 34-15. PCPAR Bit Descriptions
MPC885 PowerQUICC Family Reference Manual, Rev. 2
7 8 9 10
DR7 DR8 DR9 DR10 DR11 DR12 DR13 DR14 DR15
R/W
0x960
Table 34-14
Description
7 8 9 10
DD7 DD8 DD9 DD10 DD11 DD12 DD13 DD14 DD15
R/W
0x962
Table 34-15
Description
Parallel I/O Ports
11 12 13 14 15
describes PCDIR bits.
11 12 13 14 15
describes PCPAR bits.
34-15