Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 706

Powerquicc family
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SCC HDLC Mode
E
Status
0
Length
Pointer
E
Status
0
Length
Pointer
E
Status
0
Length
Pointer
E
Status
1
Length
Pointer
F
A
A
C
Two Frames
Received in HDLC
Time
Legend:
F = Flag
A = Address Byte
C = Control Byte
I = Information Byte
CR = CRC Byte
23-10
Receive BD 0
L
F
0
1
0x0008
32-Bit Buffer Pointer
Receive BD 1
L
F
1
0
0x000B
32-Bit Buffer Pointer
Receive BD 2
L
F
AB
1
1
1
0x0003
32-Bit Buffer Pointer
Receive BD 3
XXXX
32-Bit Buffer Pointer
Stored in Rx Buffer
I
I
I
I
I
I CR CR F
Figure 23-5. SCC HDLC Receiving using RxBDs
MPC885 PowerQUICC Family Reference Manual, Rev. 2
MRBLR = 8 Bytes for the SCC
Buffer
Address 1
Address 2
Buffer Full
Control Byte
Information
(I-Field) Bytes
Buffer
Last I-Field Byte
CRC Byte 1
Buffer Closed
CRC Byte 2
when Closing Flag
Received
Empty
Buffer
Address 1
Address 2
Abort was
Control Byte
Received after
Control Byte
Empty
Buffer
Empty
Buffer
Still Empty
Stored in Rx Buffer
Line Idle
F
A
8 Bytes
5
8 Bytes
8 Bytes
8 Bytes
A
C
Abort/Idle
Unexpected Abort
Present
Occurs before
Time
Closing Flag
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