Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 276

Memory Management Unit
Executing tlbia invalidates all entries in both TLBs, however if MI_CTR[RSVI] or MD_CTR[RSVD] is
set, the reserved entries are not invalidated. Software can explicitly invalidate one or more of these entries
by setting MD_CTR[DTLB_INDX] or MI_CTR[ITLB_INDX], negating MD_EPN[EV] or
MI_EPN[EV], and writing to the appropriate MD_RPN or MI_RPN. The TLBs are not invalidated
automatically on reset, but are disabled. However, they must be invalidated under program control during
initialization.
MPC885 PowerQUICC Family Reference Manual, Rev. 2
8-34 Freescale Semiconductor