Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 134

Memory Map
Table 2-2. Security Engine Memory Map (IMMR[14–15]=10) (continued)
SEC Lite
SEC Lite Address
05050 DEU
05058–050FF Reserved
05100 DEU
05108–053FF Reserved
05400 DEU
05408 DEU
05410 DEU
05418–057FF Reserved
05800–05FFF DEU
06000 MDEU
06008 MDEU
06010 MDEU
06018 MDEU
06020–06027 Reserved
06028 MDEU
06030 MDEU
06038 MDEU
06040–0604F Reserved
06050 MDEU
06058–060FF Reserved
06100–06127 MDEU
06128–063FF Reserved
06400–0647F MDEU
06480–067FF Reserved
06800–06FFF MDEU
07000–07FFF Reserved
1
The registers are 64 bits long, but the upper 32 bits of each register must be cleared when the register is initialized.
2-16
Description
Module
EU-Go
IV register
Key 1 register
Key 2 register
Key 3 register
FIFO
Mode register
Key size register
Data size register
Reset control register
Status register
Interrupt status register
Interrupt control register
EU_GO
Context memory
Key memory
FIFO
MPC885 PowerQUICC Family Reference Manual, Rev. 2
1
Size Section/Page
64 bits 48.1.9/48-11
168 bytes —
64 bits 48.1.10/48-12
760 bytes —
64 bits 48.1.11/48-12
64 bits 48.1.11/48-12
64 bits 48.1.11/48-12
1000 bytes —
2048 bytes 48.1.12/48-12
64 bits 48.2.2/48-13
64 bits 48.2.3/48-15
64 bits 48.2.4/48-15
64 bits 48.2.5/48-16
8 bytes —
64 bits 48.2.6/48-17
64 bits 48.2.7/48-18
64 bits 48.2.8/48-20
16 bytes —
64 bits 48.2.9/48-21
168 bytes —
32 bytes 48.2.10/48-22
728 bytes —
128 bytes 48.2.11/48-23
896 bytes —
2048 bytes 48.2.12/48-23
4096 bytes —
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