Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 351

Table 12-1. MPC885/MPC880 Signal Descriptions (continued)
Hard
Name
Reset
PE27 Hi-Z
RTS3
L1RQB
MII2-RXER
RMII2-RXER
PE26 Hi-Z
L1CLKOB
MII2-RXDV
RMII2-CRS_DV
PE25 Hi-Z
RXD4
MII2-RXD3
L1ST2
PE24 Hi-Z
SMRXD1
BRGO1
MII2-RXD2
PE23 Hi-Z
SMSYN2
TXD4
MII2-RXCLK
L1ST1
PE22 Hi-Z
TOUT2
MII2-RXD1
RMII2-RXD1
SDACK1
PE21 Hi-Z
SMRXD2
TOUT1
MII2-RXD0
RMII2-RXD0
RTS3
PE20 Hi-Z
L1RSYNCA
SMTXD2
CTS3
MII2-TXER
Freescale Semiconductor
Number Type
V4 Bidirectional General-Purpose I/O Port E Bit 27
(optional: RTS3—Active low request to send output indicates that SCC3 is
open-drain) ready to transmit data
L1RQB—D-channel request signal for serial interface TDMb
MII2-RXER —Media-independent interface 2, receive error
RMII2-RXER—Reduced media-independent interface 2, receive
error
T1 Bidirectional General-Purpose I/O Port E Bit 26
(optional: L1CLKOB—Clock output from the serial interface TDMb
open-drain) MII2-RXDV—Media-independent interface 2, receive data valid
RMII2-CRS_DV—Reduced media-independent interface 2,
carrier receive sense or data valid
T3 Bidirectional General-Purpose I/O Port E Bit 25
(optional: RXD4—Receive data input for SCC4
open-drain) MII2-RXD3—Media-independent interface 2, receive data 3
L1ST2—One of four output strobes that can be generated by the
serial interface
V8 Bidirectional General-Purpose I/O Port E Bit 24
(optional: SMRXD1—SMC1 receive data input
open-drain) BRGO1—Output clock of BRG1
MII2-RXD2—Media-independent interface 2, receive data 2
V2 Bidirectional General-Purpose I/O Port E Bit 23
(optional: SMSYN2—SMC2 external sync input
open-drain) TXD4—Transmit data for serial channel 4
MII2-RXCLK—Media-independent interface 2, receive clock
L1ST1—One of four output strobes that can be generated by the
serial interface
V1 Bidirectional General-Purpose I/O Port E Bit 22
(optional: TOUT2—Timer 2 output
open-drain) MII2-RXD1—Media-independent interface 2, receive data 1
RMII2-RXD1—Reduced media-independent interface 2, receive
data 1
SDACK1—SDMA acknowledge 1 output that is used as a
peripheral interface signal for IDMA emulation, or as a CAM
interface signal for Ethernet.
V9 Bidirectional General-Purpose I/O Port E Bit 21
(optional: SMRXD2—SMC2 receive data input
open-drain) TOUT1—Timer 1 output
MII2-RXD0—Media-independent interface 2, receive data 0
RMII2-RXD0—Reduced media-independent interface 2, receive
data 0
RTS3—Active low request to send output indicates that SCC3 is
ready to transmit data
R4 Bidirectional General-Purpose I/O Port E Bit 20
(optional: L1RSYNCA—Receive sync input for serial interface TDMa
open-drain) SMTXD2—SMC2 transmit data output
CTS3—Clear to send modem line for SCC3
MII2-TXER—Media independent interface 2, transmit error
MPC885 PowerQUICC Family Reference Manual, Rev. 2
External Signals
Description
12-21