Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 347

Powerquicc family
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Table 12-1. MPC885/MPC880 Signal Descriptions (continued)
Hard
Name
Reset
PB[19]
Hi-Z
RTS4
MII1-RXD3
PB[18]
Hi-Z
RTS2
L1ST2
RXADDR4
TXADDR4
PB[17]
Hi-Z
L1ST3
PHREQ[1]
RXADDR1
TXADDR1
BRGO2
PB[16]
Hi-Z
L1RQa
L1ST4
RTS4
PHREQ[0]
RXADDR0
TXADDR0
PB[15]
Hi-Z
BRGO3
TXCLAV
RXCLAV
PB[14]
Hi-Z
RXADDR2
TXADDR2
PC[15]
Hi-Z
DREQ0
RTS3
L1ST1
TXCLAV
RXCLAV
Freescale Semiconductor
Number
Type
V13
Bidirectional
General-Purpose I/O Port B Bit 19—Bit 19 of the general-purpose
(optional:
I/O port B
open-drain)
RTS4—Request to send modem line for SCC4
MII1-RXD3 —Media-independent interface 1, receive data 3
T12
Bidirectional
General-Purpose I/O Port B Bit 18—Bit 18 of the general-purpose
(optional:
I/O port B
open-drain)
RTS2—Request to send modem line for SCC2
L1ST2—One of four output strobes that can be generated by the
serial interface
UTOPIA multi-PHY receive address line 4 - only if in ESAR mode
UTOPIA multi-PHY transmit address line 4
W12
Bidirectional
General-Purpose I/O Port B Bit 17—Bit 17 of the general-purpose
(optional:
I/O port B
open-drain)
L1ST3—One of four output strobes that can be generated by the
serial interface
PHREQ[1]—Least-significant bit of PHY request bus (used in
classic SAR MPHY mode only)
UTOPIA multi-PHY receive address line 1 - only if in ESAR mode
UTOPIA multi-PHY transmit address line
BRGO2—Output clock of BRG2
V11
Bidirectional
General-Purpose I/O Port B Bit 16—Bit 16 of the general-purpose
(optional:
I/O port B
open-drain)
L1RQa—D-channel request signal for serial interface TDMa
L1ST4—One of four output strobes that can be generated by the
serial interface
RTS4
PHREQ[0]—Most significant bit of PHY request bus (used in
classic SAR MPHY mode only)
UTOPIA multi-PHY receive address line 0 - only if in ESAR mode
UTOPIA multi-PHY transmit address line 0
U10
Bidirectional General-Purpose I/O Port B Bit 15—Bit 15 of the general-purpose
I/O port B
BRGO3—BRG3 output clock
TXCLAV—Transmit cell available input signal
RXCLAV—Receive cell available input signal
U18
Bidirectional General-Purpose I/O Port B Bit 14—Bit 14 of the general-purpose
I/O port B
RXADDR2—UTOPIA multi-PHY receive address line 2, in ESAR
mode only
TXADDR2—UTOPIA multi-PHY transmit address line 2
R19
Bidirectional General-Purpose I/O Port C Bit 15—Bit 15 of the
general-purpose I/O port C
DREQ0—IDMA channel 1 request input
RTS3—Request to send modem line for SCC3
L1ST1—One of four output strobes that can be generated by the
serial interface
TXCLAV—Transmit cell available input signal
RXCLAV—Receive cell available input signal
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Description
3
—Request to send modem line for SCC4
External Signals
12-17

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